Hi All,
We are looking for candidates interested in VLSI/ASIC having relevant work experience.
Location : Bangalore
The Job Description (JD) is below.
We are looking for candidates interested in VLSI/ASIC having relevant work experience.
Location : Bangalore
The Job Description (JD) is below.
Please mail your resume/cv @ socasicdesign@gmail.com with following
subject line : [JD Applying for]_[Years of Experience]_experience
JD :
Design Engineer
Required skills and knowledge :
1. BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE
2. Knowledgeable in System Verilog RTL coding, PERL, Timing
3. Strong Knowledge on the IP development flow is must
4. FPGA Prototyping of the IP is a plus
5. Domain expertise in Networking protocols/Interface protocols like PCIe, USB, SATA
6. Working knowledge in Multi-clock domains and Power domains is an added advantage
7. Good Communication skills with ability and desire to work as a good team player
Verification Engineer
Required skills and knowledge :
1. BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE
2. Design and develop testbenches using HVLs like System Verilog, Specman, etc
3. Deep expertise in Verification Methodologies like OVM, UVM, VMM
4. Should have experience in creating verification environment and test plans
5. Domain expertise in Networking protocols/Interface protocols like PCIe, USB, SATA / SoC Verification is a plus
6. Familiarity with Scripting languages
7. Good communication skills with ability and desire to work as a good team player
JD :
Design Engineer
Required skills and knowledge :
1. BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE
2. Knowledgeable in System Verilog RTL coding, PERL, Timing
3. Strong Knowledge on the IP development flow is must
4. FPGA Prototyping of the IP is a plus
5. Domain expertise in Networking protocols/Interface protocols like PCIe, USB, SATA
6. Working knowledge in Multi-clock domains and Power domains is an added advantage
7. Good Communication skills with ability and desire to work as a good team player
Verification Engineer
Required skills and knowledge :
1. BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE
2. Design and develop testbenches using HVLs like System Verilog, Specman, etc
3. Deep expertise in Verification Methodologies like OVM, UVM, VMM
4. Should have experience in creating verification environment and test plans
5. Domain expertise in Networking protocols/Interface protocols like PCIe, USB, SATA / SoC Verification is a plus
6. Familiarity with Scripting languages
7. Good communication skills with ability and desire to work as a good team player