Online course on "Computing Technology"

For all the computer enthusiasts (and those who want to learn about the basics of computer design), there is an online course which started recently. It covers most of the basics of processor design starting from digital electronics till the programming end(the different layers of development and also the various jobs that are built around those layers :) ).

The link to the course is  : The Computing Technology Inside Your Smartphone

The course, though may be named as the "The Computing Technology Inside Your Smartphone", covers the fundamental of computer architecture with the case study of Qualcomm's Snapdragon processor which is used in plethora of smartphones in modern day(Smartphones from a wide range of companies like Samsung, HTC, Lenovo, Xiomi, etc use Qualcomm's snapdragon SoC{SoC is semiconductor industry jargon for System-on-Chip} ).

Kindly enroll in this course as it starts from the basics and gives out a strong idea about how such a large computer (from the PC era) has shrunk to size where it can be accommodated in our pockets(the smartphone era).

Even if you do not know anything about the electronics, this course can definitely help lay a foundation of electronics. Moreover you will be designing one such processor yourself.

Cheers !!!

Happy Learning !!! :)

 

SESSION 3: Reading from FG-MOSFETs: Part- 1

Hello everyone. In previous sessions, we have discussed the method to program and erase an FG-MOSFET. 

And programmed state corresponds to binary 0, whereas erased state corresponds to binary 1.

Now the question here lies: how will you get to know whether your FG-MOSFET has a binary '0' or a binary '1' stored in it? In other words, how will you read the data present in FG-MOSFET?

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The answer lies in the threshold voltage.
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Now suppose I connect an FG-MOSFET to two batteries, one VGS between gate and source, and the other VDS between drain and source. See the figure below.

So the voltage VGS provides an electric field in the direction shown by the red arrows in the figure below:

Because of this electric field, the holes at the interface of p-type semiconductor and oxide layer are repelled away. The electrons appear at this interface from bulk of p-type semiconductor, thus forming an n-type channel between n-type source and n-type drain. Since this n-type channel is formed from p-type semiconductor, it's called inversion channel.

What role does VDS play here? It provides the field from Drain to Source, thus pulling electrons from Source to Drain via the inversion channel formed by applying VGS. 

You may visualize the above process in the video below. The small red circles represent the holes in p-type semiconductor and the small green circles represent the electrons. Note the inversion channel formation in the video.

In the above video, the flow of electrons indicates the flow of current in external circuit. 

Now, what if the voltage VGS  was not sufficient enough to create the inversion channel? Then obviously, current will not be able to flow.So for every FG-MOSFET, there is a particular value of VGS, only above which the inversion channel is formed and conduction takes place. This value is called threshold voltage, VT.

So, the conclusion till now is: 

The following graph represents the above relation between current IDS and VGS:

As we might intuitively conclude that increasing VDS shall also increase the current IDS (the greater the VDS, greater the pull on electrons via the channel), but does it go on forever?

Reason: Channel pinch-off

Let us see what is channel pinch-off and why does it occur in the next part of this session.

Eventually you will see these concepts clubbing together to build up the concept of reading from an FG-MOSFET.

Till then : "Thresholds are not the ends! Something definitely lies beyond them"

Find Previous Post here : SESSION2: Tunneling for Programming and Erasing FG-MOSFETs

SESSION 2: Tunneling for Programming and Erasing FG-MOSFETs

As discussed in the last session, we shall see how tunneling is responsible for programming and erasing FG-MOSFETs.

We discussed in the previous session about the 2 states of the FG-MOSFET:

1. Binary 0 : Programmed => Electrons present in Floating Gate
2. Binary 1 : Erased => Electrons removed from Floating Gate

Following is the diagram of FG-MOSFET which we analyzed in the last session:

When we program the device (20 V at Control Gate and 0 V at Substrate), because of the downward electric field, the electrons are tunneled upwards through the Lower Oxide Layer into the Floating Gate. In the figure below, the black arrows downward denote the applied electric field through voltage on Control Gate. The read arrows upward show the direction of  movement of bulk electrons from the p-type substrate.

So what actually happens at the p-type substrate -TO- oxide - TO- Floating Gate interfaces which causes electrons to even cross the oxide layer in between?

 I hope you are familiar with the energy diagrams. Below you can see the energy diagram of the above mentioned interface at equilibrium.

The following notations are used in the diagram:

The following layers of the FG-MOSFET are shown in the diagram:

1. n+ type Control Gate : made of n+ type Polysilicon
2. Upper Oxide Layer: made of silicon dioxide or oxide-nitride-oxide (ONO)
3. n+ type Floating Gate : again made of n+ type Polysilicon
4. Lower Oxide Layer: made of silicon dioxide
5. p type Semiconductor

So, when a high voltage, say 20 V is applied to the Control Gate, the energy bands transform as shown in the figure below:

Now, here comes trick! I guess you must have noticed the very less thickness of Lower Oxide Layer as compared to Upper Oxide Layer. The high voltage (20 V) causes a huge drop of Fermi Level of the Floating Gate, as a result of which, the potential barrier width that an electron has to cross reduces (Note the triangular barrier developed adjoining the conduction band of p-type semiconductor). On the other hand, there is not much bending of barrier in the Upper Oxide Layer because of its thickness. So the thin potential barrier in the Lower Oxide Layer provides a path for electrons to tunnel through it. And consequently, the electrons get trapped in the Floating Gate.

This tunneling in FG-MOSFETs is called Fowler-Nordheim Tunneling (F-N Tunneling).

After going through lot of mathematical manipulations and assumptions, we obtain the following relation for tunneling probability of an electron for F-N Tunneling:

The probability equation above is a negative exponential curve [ f(x) = exp(-x) ] like below (shown for x > 0):

So, the probability that a particle can tunnel through the potential barrier increases as x decreases and gets closer to x = 0.

In our tunneling equation, the probability will hence increase if the whole factor

reduces to a very small value. This is achieved by applying a high voltage (20 V) and hence a high electric field E. Hence, by applying this high electric field, we actually increase the probability of tunneling of an electron into the Floating Gate, hence causing the program operation to happen.

Another conclusion : a small voltage ideally cannot disturb the electrons inside the Floating Gate as a small electric field cannot increase the probability of tunneling of an electron. 

I guess you have a brief idea now as to how the tunneling causes the program operation in FG-MOSFETs to happen. It is easy to deduce the band diagrams in erase operation: the bending of oxide layers happens just the reverse and electron crosses from Floating Gate to the Semiconductor.

Now, how will you detect whether there are electrons or not in the Floating Gate? In other words, how  will you read whether the FG-MOSFET contains a binary 0 (programmed)  or binary 1 (erased)? 

So, let us discuss the Read operation in FG-MOSFET in the next session, now that we have completed Program and Erase operations.

Till then, "Anyone who is not shocked by the quantum theory has not understood it"   ---- Niels Bohr.

SESSION 1: Basic Storage Unit in Flash Memories

Most of us use flash memories today in n-number of devices, for example, SSDs, eMMC, SD cards, USB pen-drives, etc. The list is expanding day by day as we need a substitute for the mechanical and heat-plus-noise producing Hard Disk Drives (HDDs). 

I would like to specify that this article assumes a coneptual knowledge of MOSFETs and their working. If you are not familiar with it you can visit this article : Basics of MOS Devices

In this first session of Flash Memories, let us start from the unit cell of storage, that is, the particular electronic component that stores a bit of data. And that component is Floating Gate MOSFETs (FG-MOSFETs). Though I think I need not expand MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors), yet it would prove beneficial later!

So, this is what a traditional MOSFET looks like:

n-type MOSFET

The MOSFET has a METAL contact attached to the conducting polysilicon layer. Below the polysilicon layer is the insulating OXIDE layer followed by the SEMICONDUCTOR.

And this is how our FG-MOSFET looks like:

n-type FG-MOSFET

As clearly distinguishable from the image above, the FG-MOSFET has an additional oxide layer and a Floating Gate sandwiched between the two oxide layers. If somehow, a couple of electrons get trapped in this floating gate, ideally they won't be able to leak out even if the power to this device is turned off, thanks to the oxide layers on both sides. This electron trapping in the floating gate forms the basic concept of non-volatile storage using FG-MOSFETs.

So, for the very basic understanding, FG-MOSFETs can have one of the following two states:

1. Electrons are trapped in Floating Gate       : Programmed State, equivalent to BINARY STATE '0'.

2. Electrons are not present in Floating Gate  : Erased State, equivalent to BINARY STATE '1'.

Hence, if you are programming an FG-MOSFET, you are basically pumping electrons into the floating gate. And if you are erasing an FG-MOSFET, you are pulling out the electrons from the floating gate, obviously if the electrons are present. 

But the question now arises: How can you pump electrons into the floating gate with the insulating oxide layers surrounding it? Similarly how can you erase/remove the electrons from the floating gate? 

The answer lies in the keyword : tunneling.

Hence, if we apply a huge voltage (say 20 V) on the control gate and 0V (GND) at the substrate, the electrons present in the bulk in p-type semiconductor will tunnel into the oxide and get trapped in the floating gate. See the video below: 

Similarly, if we want to erase the device, we just reverse the voltages, that is, 20 V at substrate and GND on Control Gate. See the video below:

I guess the term tunneling must be familiar with you, but let us discuss this concept in a bit more detail in the next section. After that, we can be clear about program and erase in an FG-MOSFET!

Till then, "be constantly amazed with electrons!"